DVCon India was a Great Success
by Gabe Moretti
October 5, 2015
Although only its second yearly event, the success of the Design and Verification Conference and Exhibition India (DVCon India), sponsored by Accellera Systems Initiative, underscored the key role played by Accellera in supporting the electronics industry, and EDA in particular, worldwide.
Starting a new conference at the time when companies are cutting back their travel budget is a risky proposition, but Accellera proved that an event rich in technical information and the opportunity to network with peers is still considered a valuable corporate investment.
Overall attendance at the conference, held September 10 and 11, was nearly 600, a record number that includes both exhibit-only and technical conference attendees. The conference attracted exhibitors supporting the semiconductor ecosystem along with start-ups from India exhibiting for the first time.
“DVCon India 2015 received an overwhelming response from the semiconductor community — from the number of abstract submissions to the record attendance on both days of the conference,” stated Gaurav Jalan, General Chair of DVCon India 2015. “In just two years it is perceived as the go to conference for the local community to understand, appreciate and participate in standards. DVCon India also provides an excellent platform for the ecosystem to discuss and get involved in the ‘Make in India’ initiative. The conference agenda was planned around the 4Cs — Contribute, Collaborate, Connect and Celebrate — and the participation from the attendees completely resonated with this spirit in mind. With two successful editions, DVCon India has set a strong footing to serve the community for years to come.”
The two-day event was inaugurated with a lamp-lighting ceremony and welcome remarks by Jalan.
Harry Foster, Chief Scientist, Design Verification Technology Division at Mentor Graphics, delivered a thoughtful keynote speech outlining the rising complexity of designs. He referred to tools and methods required to support engineers to be more productive now and in the near future as “faster horses.”
In the second keynote of the opening day Vinay Shenoy, Managing Director of Infineon Technologies India, addressed a packed room of more than 550 attendees. In addition to reiterating the rising complexity throughout the entire design ecosystem, Vinay highlighted the Make in India initiative. The major objective behind the initiative is to focus on 25 sectors of the economy — electronics is one of them — for job creation and skill enhancement.
The entire afternoon of the first day was dedicated to tutorials, with six covering SystemVerilog and UVM topics and four covering ESL. This year DVCon India is celebrating the 10-year anniversary of SystemVerilog, as well as the release of Universal Verification Methodology (UVM) 1.2 to the IEEE P1800.2 working group for development and ongoing maintenance as an IEEE standard. The Gala Dinner was well attended and provided an additional opportunity for networking in a more relaxed atmosphere. Both SystemVerilog and UVM are creations of Accellera’s working groups.
Ajeetha Kumari, Vice Chair of DVCon India 2015, opened the second day’s proceedings. Manoj Gandhi, VP & GM of the Verification Group, Synopsys, and Atul Bhatia, a mentor and Angel Investor, delivered inspirational keynotes describing the next generation of verification innovation and the opportunities that the Make in India initiative offer in semiconductor design systems.
After a break, the conference continued with tracks on both ESL and Design and Verification. The high number of papers received and accepted by the Program Committee required up to five concurrent tracks offering both paper presentations and panel discussions for the entire day. The exhibit floor was also open on the second day of the conference and it remained busy throughout the day.
As is customary with technical conferences, DVCon India awarded prizes to the best papers presented, as voted by the conference attendees.
The Award for Best Paper Presentation in the ESL track went to Achutha Kirankumar V M, Bindumadhava S, Aarti Gupta and Disha Puri from Intel for their presentation titled “Leveraging ESL Approach to Formally Verify Algorithmic Implementations.” The Best Paper Presentation in the DV track went to Sailaja Akkem of Microsemi for the paper titled “UVM RAL: Registers on demand – Elimination of the Unnecessary.” In the poster category, Raghavendra Jn, Harathi Gudidevuni and Nikhil Gupta from Qualcomm won the award for the poster titled “Dynamic Power Automation UVM Framework.”
“The technical program and networking opportunities this year were remarkable,” commented Prasanna Kesavan, DVCon India Promotions Chair. “Attendees have come to expect a high quality selection of papers and posters plus better networking, and we were able to deliver just that. We consistently receive more submissions than we can accept, so we pick the best of the best for our attendees.”