Tutorial: Portable Test and Stimulus: The Next Level of Verification Productivity is Here

Portable StimulusPresented at DVCon U.S. 2018 on February 26, 2018

Why reinvent the wheel? Up until now, verification teams had been unable to reuse tests as their efforts progressed from virtual platforms to RTL, block-level to system-level or from simulation to emulation, prototyping or silicon. The advent of UVM, constrained-random verification and functional coverage improved the reusability of portions of the verification environment, but these advances have not been able to enable reuse of verification intent throughout the product development process. Accellera formed the Portable Stimulus Working Group to produce a standard that would allow just this sort of verification intent reuse. This in-depth technical tutorial focuses on a set of typical design use cases from a variety of applications and shows how to use the Portable Test and Stimulus Standard to create an abstract model of your verification intent. The tutorial then demonstrates how these models can be used to generate scenarios to be executed on the different platforms and environments used in your development process, and how the models can be reused and leveraged from project to project.

For each application, the tutorial shows:

  • How to model the critical verification intent
  • How that model may be used to generate multiple compatible coverage-centered scenarios
  • How to map that intent into multiple target-specific implementations
  • How the declarative semantics of the model drive the generation of executable tests on different platforms to implement the desired scenarios

The tutorial also includes a Q&A session with the members of the Accellera Portable Stimulus Working Group.

The tutorial is split into three parts:

  • Part 1: Tutorial
    Tom Fitzpatrick, Mentor, a Siemens Business

  • Part 2: Tutorial
    Adnan Hamid, Breker Verification Systems

  • Part 3: Panel Discussion
    Panelists: Faris Khundakjie, Intel; Adnan Hamid, Breker Verification Systems; Sharon Rosenberg, Cadence; Tom Fitzpatrick, Mentor, a Siemens Business; Srivatsa Vasudevan, Synopsys; Karthick Gururaj, Vayavya
    Moderated by: Larry Melling, Cadence

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